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december 2008 rev 3 1/28 28 VNQ810M quad channel hi gh side driver features cmos compatible inputs open drain status outputs on state open load detection off state open load detection shorted load protection undervoltage and overvoltage shutdown loss of ground protection very low standby current reverse battery protection (a) description the VNQ810M is a quad hsd formed by assembling two vnd810m chips in the same so- 28 package. the vnd810m is a monolithic device made using | stmicroelectronics vipower m0-3 technology. the vnq830m is intended for driving any type of multiple load with one side connected to ground. the active v cc pin voltage clamp protects the device against low energy spikes (see iso7637 transient compatibility ta ble). active current limitation combined with thermal shutdown and automatic restart protects the device against overload. the current limitation threshold is aimed at detecting the 21w/12v standard bulb as an overload fault. the device detects the open load condition in both the on and off state. in the off state the device detects if the output is shorted to v cc . the device automatically turns off in the case where the ground pin becomes disconnected. type r ds(on) i out v cc VNQ810M 150m ? (1) 1. per each channel. 0.6a (1) 36v a. see application schematic on page 18 so-28 (double island) table 1. device summary package order codes tube tape and reel so-28 (double island) VNQ810M VNQ810M13tr www.st.com
contents VNQ810M 2/28 contents 1 block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.4 electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.1 gnd protection network against reverse battery . . . . . . . . . . . . . . . . . . . 18 3.1.1 solution 1: a resistor in the ground line (rgnd only) . . . . . . . . . . . . . . 18 3.1.2 solution 2: a diode (d gnd ) in the ground line . . . . . . . . . . . . . . . . . . . . 19 3.2 load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.3 mcu i/o protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.4 open load detection in off state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.5 maximum demagnetization energy (v cc = 13.5v) . . . . . . . . . . . . . . . . . . 21 4 package and pcb thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.1 so-28 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5 package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.1 ecopack ? packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.2 so-28 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
VNQ810M list of tables 3/28 list of tables table 1. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6 table 3. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 4. thermal data (per island) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 5. power output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 6. protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 7. v cc - output diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 0 table 8. switching (v cc = 13v; tj = 25c) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 9. logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 10. status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 11. openload detection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 12. truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 13. electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 table 14. thermal calculation according to the pcb heatsink area . . . . . . . . . . . . . . . . . . . . . . . . . . 22 table 15. thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 table 16. so-28 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 table 17. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
list of figures VNQ810M 4/28 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 3. current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 4. status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 5. switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 6. waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 7. off state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 8. high level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 9. input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 10. turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 11. overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 12. turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 13. ilim vs tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 14. on state resistance vs vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 15. input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 16. input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 17. on state resistance vs tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 18. input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 19. status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 20. status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 21. status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 22. openload on state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 7 figure 23. openload off state voltage detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 24. application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 25. openload detection in off state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 26. maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 27. so-28 pc board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 28. rthj-amb vs pcb copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 23 figure 29. thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 30. thermal fitting model of a quad channel hsd in so-28 . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 31. so-28 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 figure 32. so-28 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 figure 33. so-28 tape and reel shipment (suffix ?tr?) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
VNQ810M block diagram and pin description 5/28 1 block diagram and pin description figure 1. block diagram overtemp. 1 v cc1,2 gnd1,2 input1 output1 overvoltage logic driver 1 status1 v cc clamp undervoltage clamp 1 openload on 1 current limiter 1 openload off 1 output2 driver 2 clamp 2 openload on 2 openload off 2 overtemp. 2 input2 status2 current limiter 2 overtemp. 3 v cc3,4 gnd3,4 input3 output3 overvoltage logic driver 3 status3 v cc clamp undervoltage clamp 3 openload on 3 current limiter 3 openload off 3 output4 driver 4 clamp 4 openload on 4 openload off 4 overtemp. 4 input4 status4 current limiter 4
block diagram and pin description VNQ810M 6/28 figure 2. configuration diagram (top view) table 2. suggested connections for unused and not connected pins connection / pin status n.c. output input floating x x x x to ground x through 10k ? resistor v cc 1,2 gnd 1,2 input1 status1 status2 v cc 1,2 v cc 3,4 gnd 3,4 input3 status3 v cc 3,4 v cc 3,4 output4 output4 output4 output3 output2 output2 output2 output1 v cc 1,2 output3 output3 output1 output1 input2 status4 input4 1 14 15 28
VNQ810M electrical specifications 7/28 2 electrical specifications 2.1 absolute maximum ratings stressing the device above the rating listed in the ?absolute maximum ratings? table may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. refer also to the stmicroelectronics sure program and other relevant quality document. table 3. absolute maximum ratings symbol parameter value unit v cc dc supply voltage 41 v - v cc reverse dc supply voltage - 0.3 v - i gnd dc reverse ground pin current - 200 ma i out dc output current internally limited a - i out reverse dc output current - 6 a i in dc input current +/- 10 ma i stat dc status current +/- 10 ma v esd electrostatic discharge (human body model: r=1.5k ?; c = 100pf) - input - status - output - v cc 4000 4000 5000 5000 v v v v e max maximum switching energy (l = 2.5mh; r l = 0 ? ; v bat = 13.5v; t jstart = 150oc; i l = 9a) 174 mj p tot power dissipation (per island) at t lead = 25c 6.25 w t j junction operating temperature internally limited c t stg storage temperature - 55 to 150 c
electrical specifications VNQ810M 8/28 2.2 thermal data 2.3 electrical characteristics values specified in this section are for 8v < v cc < 36v; -40c < t j < 150c, unless otherwise stated. figure 3. current and voltage conventions note: v fn = v ccn - v outn during reverse battery condition. table 4. thermal data (per island) symbol parameter value unit r thj-lead thermal resistance junction-lead 20 c/w r thj-amb thermal resistance junction-ambient (one chip on) 60 (1) 1. when mounted on a standard single-sided fr-4 board with 0.5cm 2 of cu (at least 35 m thick) connected to all v cc pins. horizontal mounting and no artificial air flow. 44 (2) 2. when mounted on a standard single-sided fr-4 board with 6cm 2 of cu (at least 35 m thick) connected to all v cc pins. horizontal mounting and no artificial air flow. c/w r thj-amb thermal resistance junction-ambient (two chips on) 46 (1) 31 (2) c/w i s1,2 i gnd1,2 output3 v cc1,2 gnd 1,2 input2 i out3 v cc1,2 v out4 output2 i out2 v out3 input1 i in1 status1 i stat1 output1 i out1 output4 i out4 v out2 v out1 i in2 i stat2 i stat3 i in4 i stat4 status2 status3 status4 input3 input4 v stat4 v in4 v stat3 v in3 v stat2 i in3 v in2 v stat1 v in1 i gnd3,4 gnd 3,4 i s3,4 v cc3,4 v cc3,4 v f1 (*)
VNQ810M electrical specifications 9/28 note: to ensure long term reliability under heavy ov erload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. if the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles. table 5. power output symbol parameter test conditions min. typ. max. unit v cc operating supply voltage 5.5 13 36 v v usd undervoltage shutdown 3 4 5.5 v v ov overvoltage shutdown 36 v r on on state resistance i out = 0.5a; t j = 25c i out = 0.5a; v cc > 8v 150 300 m ? m ? i s supply current off state; v cc = 13v; v in = v out = 0v off state; v cc = 13v; v in = v out = 0v; t j = 25c on state; v cc = 13v; v in = 5v; i out = 0a 12 12 5 40 25 7 a a ma i l(off1) off state output current v in = v out = 0v 0 50 a i l(off2) off state output current v in = 0v; v out = 3.5v -75 0 a i l(off3) off state output current v in = v out = 0v; v cc = 13v; t j = 125c 5a i l(off4) off state output current v in = v out = 0v; v cc = 13v; t j =25c 3a table 6. protections symbol parameter test conditions min. typ. max. unit t tsd shutdown temperature 150 175 200 c t r reset temperature 135 c t hyst thermal hysteresis 7 15 c t sdl status delay in overload conditions t j > t tsd 20 s i lim current limitation v cc = 13v 5.5v < v cc < 36v 0.7 0.9 1.4 1.4 a a v demag turn-off output clamp voltage i out = 0.5a v cc - 41 v cc - 48 v cc - 55 v
electrical specifications VNQ810M 10/28 table 7. v cc - output diode symbol parameter test conditions min. typ. max. unit v f forward on voltage - i out = 0.53a; t j = 150c 0.6 v table 8. switching (v cc = 13v; t j = 25c) symbol parameter test cond itions min. typ. max. unit t d(on) turn-on delay time r l = 26 ? from v in rising edge to v out = 1.3v (see figure 5 ) 30 s t d(off) turn-off delay time r l = 26 ? from v in falling edge to v out = 11.7v (see figure 5 ) 30 s dv out /dt (on) turn-on voltage slope r l = 26 ? from v out = 1.3v to v out = 10.4v (see figure 5 ) see figure 10 v/s dv out /dt (off) turn-off voltage slope r l = 26 ? from v out = 11.7v to v out = 1.3v (see figure 5 ) see figure 12 v/s table 9. logic inputs symbol parameter test conditions min. typ. max. unit v il input low level 1.25 v i il low level input current v in = 1.25v 1 a v ih input high level 3.25 v i ih high level input current v in = 3.25v 10 a v i(hyst) input hysteresis voltage 0.5 v v icl input clamp voltage i in = 1ma i in = -1ma 66.8 - 0.7 8v v table 10. status pin symbol parameter test conditions min. typ. max. unit v stat status low output voltage i stat = 1.6ma 0.5 v i lstat status leakage current normal operation; v stat = 5v 10 a c stat status pin input capacitance normal operation; v stat = 5v 100 pf v scl status clamp voltage i stat = 1ma i stat = - 1ma 66.8 - 0.7 8v v
VNQ810M electrical specifications 11/28 figure 4. status timings figure 5. switching characteristics table 11. openload detection symbol parameter test conditions min. typ. max. unit i ol openload on state detection threshold v in = 5v 20 40 80 ma t dol(on) openload on state detection delay i out = 0a 200 s v ol openload off state voltage detection threshold v in = 0v 1.5 2.5 3.5 v t dol(off) openload detection delay at turn-off 1000 s v inn v statn t dol(off) open load status timing (with external pull-up) v inn v statn over temp status timing t sdl t sdl i out < i ol v out > v ol t dol(on) t j > t tsd v out dv out /dt (on) t r 80% 10% t f dv out /dt (off) i sense t t 90% t d(off) input t 90% t d(on) t dsense
electrical specifications VNQ810M 12/28 table 12. truth table conditions input output status normal operation l h l h h h current limitation l h h l x x h (t j < t tsd ) h (t j > t tsd ) l overtemperature l h l l h l undervoltage l h l l x x overvoltage l h l l h h output voltage > v ol l h h h l h output current < i ol l h l h h l
VNQ810M electrical specifications 13/28 table 13. electrical transient requirements iso t/r 7637/1 test pulse test level i ii iii iv delays and impedance 1 - 25v - 50v - 75v - 100v 2ms, 10 ? 2 + 25v + 50v + 75v + 100v 0.2ms, 10 ? 3a - 25v - 50v - 100v - 150v 0.1s, 50 ? 3b + 25v + 50v + 75v + 100v 0.1s, 50 ? 4 - 4v - 5v - 6v - 7v 100ms, 0.01 ? 5 + 26.5v + 46.5v + 66.5v + 86.5v 400ms, 2 ? iso t/r 7637/1 test pulse test level iiiiiiiv 1c c c c 2c c c c 3a c c c c 3b c c c c 4c c c c 5c e e e class contents c all functions of the device are performed as designed after exposure to disturbance. e one or more functions of the device is not performed as designed after exposure and cannot be returned to proper operation without replacing the device.
electrical specifications VNQ810M 14/28 figure 6. waveforms open load without external pull-up status n input n normal operation undervoltage v cc v usd v usdhyst input n overvoltage v cc v cc > v ov status input n status n status n input n status n input n open load with external pull-up undefined overtemperature input n status n t tsd t r t j load voltage n v cc v ol v ol
VNQ810M electrical specifications 15/28 2.4 electrical characteristics curves figure 7. off state output current figure 8. high level input current -50 -25 0 25 50 75 100 125 150 175 tc (oc) 0 0.16 0.32 0.48 0.64 0.8 0.96 1.12 1.28 1.44 1.6 il (off1) (ua ) off state vcc=36v vin=vout=0v -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 iih (ua ) vin=3.25v figure 9. input clamp voltage figure 10. turn-on voltage slope -50 -25 0 25 50 75 100 125 150 175 tc (c) 6 6.2 6.4 6.6 6.8 7 7.2 7.4 7.6 7.8 8 vicl (v) ii n =1 m a -50 -25 0 25 50 75 100 125 150 175 tc (oc) 0 100 200 300 400 500 600 700 800 900 1000 dvout/dt(on) (v/ms) vcc=13v rl=13ohm figure 11. overvoltage shutdown figure 12. turn-off voltage slope -50 -25 0 25 50 75 100 125 150 175 tc (c ) 30 32 34 36 38 40 42 44 46 48 50 vov (v) -50 -25 0 25 50 75 100 125 150 175 tc (c) 200 250 300 350 400 450 500 550 600 dv out/dt(off) (v /ms) ri=6.5ohm
electrical specifications VNQ810M 16/28 figure 13. i lim vs t case figure 14. on state resistance vs v cc -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 2 4 6 8 10 12 14 16 18 20 ilim (a ) vcc=13v 5 10152025303540 vcc (v) 0 10 20 30 40 50 60 70 80 90 100 110 120 ron (mohm) io u t =5 a tc = - 40c tc =25c tc =150c figure 15. input high level figure 16. input hysteresis voltage -50 -25 0 25 50 75 100 125 150 175 tc (c) 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 vih (v) -50 -25 0 25 50 75 100 125 150 175 tc (c) 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 vhyst (v) figure 17. on state resistance vs tcase figure 18. input low level -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 50 100 150 200 250 300 350 400 ron (mohm) io u t =1 a vcc= 8v; 13v & 36v -50 -25 0 25 50 75 100 125 150 175 tc (c) 1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 vil (v)
VNQ810M electrical specifications 17/28 figure 19. status leakage current figure 20. status low output voltage -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0.01 0.02 0.03 0.04 0.05 ils ta t (ua ) vs tat=5v -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 v stat (v ) is tat=1.6ma figure 21. status clamp voltage figure 22. openload on state detection threshold -50 -25 0 25 50 75 100 125 150 175 tc (c) 6 6.2 6.4 6.6 6.8 7 7.2 7.4 7.6 7.8 8 vscl (v) is tat=1ma -50 -25 0 25 50 75 100 125 150 175 tc (c) 50 60 70 80 90 100 110 120 130 140 150 io l (ma ) vcc=13v vin=5v figure 23. openload off state voltage detection threshold -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 vol (v) vin=0v
application information VNQ810M 18/28 3 application information figure 24. application schematic note: channels 3 & 4 have the same internal circuit as channel 1 & 2. 3.1 gnd protection networ k against reverse battery this section provides two solutions for implementing a ground protection network against reverse battery. 3.1.1 solution 1: a resist or in the ground line (r gnd only) this can be used with any type of load. the following show how to dimension the r gnd resistor: 1. r gnd 600mv / 2 (i s(on)max ) 2. r gnd ( - v cc ) / ( - i gnd ) v cc1,2 output2 +5v r prot output1 status1 input1 +5v status2 input2 +5v d gnd r gnd v gnd gnd1,2 gnd3,4 output3 output4 cu v cc3,4 status3 input3 status4 input4 +5v +5v r prot r prot r prot r prot r prot r prot r prot d ld
VNQ810M application information 19/28 where - i gnd is the dc reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. power dissipation in r gnd (when v cc < 0 during reverse battery situations) is: p d = ( - v cc ) 2 / r gnd this resistor can be shared amongst several different hsds. please note that the value of this resistor should be calculated with formula (1) where i s(on)max becomes the sum of the maximum on-state currents of the different devices. please note that, if the microprocessor ground is not shared by the device ground, then the r gnd will produce a shift (i s(on)max * r gnd ) in the input thresholds and the status output values. this shift will vary depending on how ma ny devices are on in the case of several high side drivers sharing the same r gnd . if the calculated power dissipation requires the use of a large resistor, or several devices have to share the same resistor, then st suggests using solution 2 below. 3.1.2 solution 2: a diode (d gnd ) in the ground line a resistor (r gnd = 1k ? ) should be inserted in parallel to d gnd if the device will be driving an inductive load. this small signal diode can be safely shared amongst several different hsd. also in this case, the presence of t he ground network will produc e a shift (j600mv) in the input threshold and the status output values if the microprocessor ground is not common with the device ground. this shift will not va ry if more than one hsd shares the same diode/resistor network. series resistor in input and status lines are also required to prevent that, during battery voltage transient, the current exceeds the absolute maximum rating. safest configuration for unused input and status pin is to leave them unconnected. 3.2 load dump protection d ld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the v cc maximum dc rating. the same applies if the device is subject to transients on the v cc line that are greater than those shown in the iso t/r 7637/1 table. 3.3 mcu i/o protection if a ground protection network is used an d negative transients are present on the v cc line, the control pins will be pulled negative. st suggests to insert a resistor (r prot ) in line to prevent the c i/o pins from latching up. the value of these resistors is a compromise between the leakage current of c and the current required by the hsd i/os (input levels compatibility) wi th the latch-up limit of c i/os: - v ccpeak / i latchup r prot (v oh c - v ih - v gnd ) / i ihmax
application information VNQ810M 20/28 example for the following conditions: v ccpeak = - 100v i latchup 20ma v oh c 4.5v 5k ? r prot 65k ? . recommended values are: r prot = 10k ? 3.4 open load detection in off state off state open load detection requires an external pull-up resistor (r pu ) connected between output pin and a positive supply voltage (v pu ) like the +5v line used to supply the microprocessor. the external resistor has to be selected according to the following requirements: 1) no false open load indication when load is connected: in this case we have to avoid v out to be higher than v olmin ; this results in th e following condition v out = (v pu / (r l + r pu ))r l < v olmin. 2) no misdetection when load is disconnected: in this case the v out has to be higher than v olmax ; this results in the following condition r pu < (v pu - v olmax ) / i l(off2) . because i s(off) may significantly increase if v out is pulled high (up to several ma), the pull- up resistor r pu should be connected to a supply that is switched off when the module is in standby. figure 25. openload detection in off state v ol v batt. v pu r pu r l r driver + logic + - in p u t status v cc out ground i l(off2)
VNQ810M application information 21/28 3.5 maximum demagnetization energy (v cc = 13.5v) figure 26. maximum turn-off current versus load inductance note: values are generated with r l = 0 ?. in case of repetitive pulses, t jstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves b and c. v in , i l t demagnetization demagnetization demagnetization a = single pulse at t jstart = 150oc b= repetitive pulse at t jstart = 100oc c= repetitive pulse at t jstart = 125oc 0.1 1 10 1 10 100 1000 l(mh) i lmax (a) a b c
package and pcb thermal data VNQ810M 22/28 4 package and pcb thermal data 4.1 so-28 thermal data figure 27. so-28 pc board note: layout condition of r th and z th measurements (pcb fr4 area = 58mm x 58mm, pcb thickness = 2mm, cu thickness = 35m, copper areas: 0.5 cm 2 , 3 cm 2 , 6 cm 2 ). r tha = thermal resistance junction to ambient with one chip on r thb = thermal resistance junction to ambient with both chips on and p dchip1 = p dchip2 r thc = mutual thermal resistance table 14. thermal calculation according to the pcb heatsink area chip 1 chip 2 t jchip1 t jchip2 note on off r tha x p dchip1 + t amb r thc x p dchip1 + t amb off on r thc x p dchip2 + t amb r tha x p dchip2 + t amb on on r thb x (p dchip1 + p dchip2 ) + t amb r thb x (p dchip1 + p dchip2 ) + t amb p dchip1 = p dchip2 on on (r tha x p dchip1 ) + r thc x p dchip2 + t amb (r tha x p dchip2 ) + r thc x p dchip1 + t amb p dchip1 p dchip2
VNQ810M package and pcb thermal data 23/28 figure 28. r thj-amb vs pcb copper area in open box free air condition figure 29. thermal impedance junction ambient single pulse 10 20 30 40 50 60 70 01234567 pcb cu heats ink area (cm^ 2)/ is land rt h j _am b (c / w) r tha r thb r thc 0.01 0.1 1 10 100 0.0001 0.001 0.01 0.1 1 10 100 1000 time(s ) zth(c / w) 6 cm ^2/ is land 3 c m ^2/ is land 0,5 cm ^2/ is land one channel on two channels on on same chip
package and pcb thermal data VNQ810M 24/28 equation 1 : pulse calculation formula figure 30. thermal fitting model of a quad channel hsd in so-28 table 15. thermal parameters area / island (cm 2 ) footprint 6 r1 = r7 = r13 = r15 (c/w) 0.35 r2 = r8 = r14 = r16 (c/w) 1.8 r3 = r9 (c/w) 4.5 r4 = r10 (c/w) 11 r5 = r11 (c/w) 15 r6 = r12 (c/w) 30 13 c1 = c7 = c13 = c15 (w.s/c) 0.0001 c2 = c8 = c14 = c16 (w.s/c) 7e-04 c3 = c9 (w.s/c) 6e-03 c4 = c10 (w.s/c) 0.2 c5 = c11 (w.s/c) 1.5 c6 = c12 (w.s/c) 5 8 r17 = r18 (c/w) 150 z th r th z thtp 1 ? () + ? = where t p t ? = pd1 c1 r4 c3 c4 r3 r1 r6 r5 r2 c5 c6 c2 pd2 r14 c13 c14 r13 tj_1 tj_2 t_amb pd3 c7 r10 c9 c10 r9 r7 r12 r11 r8 c11 c12 c8 pd4 r16 c15 c16 r15 tj_3 tj_4 r17 r18
VNQ810M package and packing information 25/28 5 package and packing information 5.1 ecopack ? packages in order to meet environmental requirements, st offers these devices in ecopack ? packages. these packages have a lead-free second-level interconnect. the category of second-level interconnect is marked on the package and on the inner box label, in compliance with jedec standard jesd97. the maximum ratings related to soldering conditions are also marked on the inner box label. ecopack is an st trademark. ecopack specifications are available at: www.st.com. figure 31. so-28 package dimensions table 16. so-28 mechanical data symbol millimeters min. typ. max. a 2.65 a1 0.10 0.30 b 0.35 0.49 b1 0.23 0.32 c0.50 c1 45 (typ.) d 17.7 18.1 e 10.00 10.65 e1.27 e3 16.51 f 7.40 7.60 l 0.40 1.27 s 8 (max.)
package and packing information VNQ810M 26/28 5.2 so-28 packing information figure 32. so-28 tube shipment (no suffix) figure 33. so-28 tape and reel shipment (suffix ?tr?) all dimensions are in mm. base q.ty 28 bulk q.ty 700 tube length ( 0.5) 532 a 3.5 b 13.8 c ( 0.1) 0.6 a c b base q.ty 1000 bulk q.ty 1000 a (max) 330 b (min) 1.5 c ( 0.2) 13 f 20.2 g (+ 2 / -0) 16.4 n (min) 60 t (max) 22.4 tape dimensions according to electronic industries association (eia) standard 481 rev. a, feb. 1986 all dimensions are in mm. tape width w 16 tape hole spacing p0 ( 0.1) 4 component spacing p 12 hole diameter d ( 0.1/-0) 1.5 hole diameter d1 (min) 1.5 hole position f ( 0.05) 7.5 compartment depth k (max) 6.5 hole spacing p1 ( 0.1) 2 top cover tape end start no components no components components 500mm min 500mm min empty components pockets saled with cover tape. user direction of feed reel dimensions
VNQ810M revision history 27/28 6 revision history table 17. document revision history date revision changes 09-sep-2004 1 initial release. 03-may-2006 2 minor changes. current and voltage convention update (page 3). configuration diagram (top view) & suggested connections for unused and n.c. pins insertion (page 3). 6 cm2 cu condition insertion in thermal data table (page 4). v cc - output diode section update (page 4). protections note insertion (page 5) revision history table insertion (page 20). disclaimers update (page 21). 02-dec-2008 3 document reformatted and restructured. added contents, list of tables and figures. added ecopack ? packages information.
VNQ810M 28/28 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by an authorized st representative, st products are not recommended, authorized or warranted for use in milita ry, air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2008 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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